Effects of Noise Floor, Linearity & Mismatch Error on RF Measurements

As RF measurements today become more and more demanding on semiconductor test, there is a need to revisit the fundamentals on how the characteristics of RF instruments affect the measurements. This article shows how the effects of noise floor, linearity, and mismatch error can affect RF measurements. PDF, 70 KB

Concurrent Testing with RF

Highly integrated SOC communication devices incorporate RF cores. As in traditional Digital and Mixed Signal SOC implementations a primary goal of test planning is to maximize parallel resource utilization of the ATE system to minimize test cost. In this article Concurrent Test (CCT) is demonstrated as a useful tool in this optimization. ATE architectural capabilities, planning processes and results analysis are discussed relative to CCT optimization. PDF, 546 KB

Testing High-Speed Digital Interfaces with Automated Test Equipment

The current success of smartphones and the relentless trend to reduce cost and add capabilities every year are key drivers in the wireless semiconductor business. Combining various RF technologies iFor high-speed digital applications the DUT loadboard performance is critical. Even using state of the art materials and design techniques it is not possible to completely eliminate the DUT loadboard effects. One approach to compensate for the DUT loadboard loss is to use de-embedding. This paper provides two sample sections which are reprinted from the up-coming book "Testing High-Speed Digital Interfaces with Automated Test Equipment" by Jose Moreira and Hubert Werkmann with permission from Artech House, Inc. The book will be published in July/August 2010. PDF, 647 KB

High Density RF Loadboard Design

The current success of smartphones and the relentless trend to reduce cost and add capabilities every year are key drivers in the wireless semiconductor business. Combining various RF technologies into one device along with the desire for multi-site testing can easily increase the RF ATE test fixture port count to a range of 48 and beyond. While a few ATE vendors provide test equipment for this requirement, the question remains on how to manage the interfacing and the test fixture design for high density RF without losing performance. The current interfacing and layout paradigm will undergo a significant change. The RF connectors are moved further away from the DUT to allow easier assembly and debugging, but with higher risk of performance degradation due to loss, crosstalk and interference. This paper evaluates new hardware and layout techniques, discusses mechanical, performance and crosstalk requirements that need to be applied and describes the consequences this will have for loadboard design. PDF, 1 MB  

RF Measurement Fundamentals

Wireless SOC test is a very fast paced industry. The approaches used a few years ago for common measurements must constantly be changed and updated in order to meet today’s test requirements. As devices become more complex, the ability to make complex measurements is paramount to successfully bringing new products to market. Equally important is test time. For bench setups, a 100ms measurement settling time, or a 50ms source seek time are perfectly acceptable. In test engineering, time is a very valuable commodity and delays such as these cannot be tolerated. Entirely new measurement approaches need to be exploited in order to get the same information about DUT performance in a fraction of the time for traditional methods. This article is the first in a series of articles that will appear in the coming issues of go/semi. The goal of these articles will be to review some RF measurement fundamentals and to explore some of the latest findings and techniques used to achieve fast and reliable results with modern ATE systems. PDF, 22 KB.

MTP: New Memory Test Solution Enabled by Software for True Per-pin Test Processor Architecture System

Memory is important part of SOC/SiP. Today’s devices have a variety of capabilities for controlling, communication, entertainment, etc., and memory supports those capabilities as tempory workspace, program code storage and cache. This paper describes how to test memory with ATE without dedicated hardware for memory test. PDF, 244 KB

Multi-Site P1dB Measurement using Swept Input Power Methodology on V93000 Port Scale RF

This application note discusses an approach and its implementation for fast multi-site RX and TX P1dB compression point measurement using Swept Input Power Methodology (SIPM) on the Verigy 93000 Port Scale RF platform. DC waveforms are used to generate controlled LO feed through from the sources for RX measurements, and swept power single side-band waveforms are used for TX measurements, eliminating the need for switching power levels repeatedly and serially for each. PDF, 255 KB

The Basics of Noise Figure Measurements for ATE

Noise figure measurements are essential to ensure that minimal noise is added to the receiver chain of the device. Once additional noise joins the signals, receiver performance will be degraded. In extreme cases, it is no longer possible to distinguish the legitimate signal from the noise. The signal and noise get processed together. Attempts to amplify the signal level, for example, will raise the noise level by an equal amount. There are two primary techniques used to perform noise figure measurements on these devices with automated test equipment (ATE); Y-Factor and Cold Noise (or Gain) methods. Differences between making measurements on RF-to-RF devices and RF-to-baseband devices are discussed in this article. PDF, 108 KB

Solving MIPI D-PHY Transmitter Test Challenges

MIPI stands for “Mobile Industry Processor Interface”, which provides a flexible, low-cost, high-speed interface solution for communication links between components inside a mobile device. With more than 100 companies backing this emerging standard, MIPI is expected to be widely adopted for smart phones and similar application-rich networked devices, as well as in personal digital assistants (PDAs), and other consumer electronics. This paper, which complements another one published in the December 2008 issue of go/semi newsletter, elaborates the transmitter test solution for the MIPI D-PHY standard. PDF, 836 KB.

System Noise Consideration

When noise is discussed, the meaning of “noise” is different. In general, probably it means “unwanted or unnecessary signal components.” In this article, “noise” means the unnecessary signal components generated by the system (or tester) itself. It does not include the signal components generated by the device or DUT, directly or indirectly. Therefore, it does not include the power supply noise that caused by the DUT, cross-talk from the signal generated by the DUT nor the ground bounce generated by the DUT. It does include the system background noise, spurious noise generated by the system resources and the noise generated by the system resource itself. PDF, 319 KB.

Reduce the peak-to-peak variation of the noise floor: Pseudo Video Filter for the digitized data

This article introduces the technique to reduce the peak-to-peak variation of the noise floor of the (Fast Fourier Transform) FFT calculation results. This technique keeps the SNR value but reduces the peak-to-peak variation of the noise floor. Therefore, you can find the harmonics or the spurious spectrums that amplitudes are very close to the noise floor without losing noise floor characteristics. You can calculate the SNR or THD value from this result and the calculated SNR or THD value is same as the results calculated by the ordinary method. PDF, 480 KB.

An Introduction to Scan Test for Test Engineers (Part 2 of 2)

This paper gives a short introduction into the basics of scan test. The following topics are covered: design, verification, ATPG, test verification, pattern conversion, and debugging on the ATE. Additionally it is discussed how this knowledge about scan test can help to understand the failures and to obtain analysis results in a more efficient and faster way. PDF, 70 KB.

Fundamentals of DC Testing

In the beginning of this paper, Ohm’s law, which is the most important electric law regarding DC testing, will be reviewed. Resistance measurement will also be discussed. PDF, 48 KB


An Introduction to Scan Test for Test Engineers

For any modern chip design with a considerably large portion of logic, design for test (DFT) and in particular implementing scan test are mandatory parts of the design process that helps to reduce the complexity of testing sequential circuits. The basic concept of a scan test is to connect memory elements like flipflops or latches forming chains, so that shifting through scan chains allows to control and observe the states of the DUT.
Since scan vectors are based on regular and uniform structures, basic knowledge about scan designs, scan test modes and targeted fault models helps to interpret scan vectors. Therefore, in this paper a basic introduction to scan test is given, so that a test engineer who debugs scan test on an ATE can be more efficient in a first level of fault analysis - beyond just being able to do logging of failing pins and cycles.

Introduction to FM-Stereo-RDS Modulation

Frequency modulation (FM) has a long history of its application and is widely used in radio broadcast. To transmit stereo music, FM is enhanced by stereo multiplexing which carries both L and R audio channel content. With the digital age, Radio Data System (RDS) enables FM to carry text information such as traffic, weather, and radio station information which can be displayed on the end-user’s device interface. Currently, growing number of mobile phones and consumer mobile devices will have an integrated FM receiver feature. The FM transmitter feature is also becoming popular for allowing users to transmit audio content from their mobile devices through their car radio. To make sure the FM-related functions work well, the FM mono, FM stereo, and FM RDS functions need to be tested in production. In this paper, we will discuss FM theory, FM stereo multiplexing and the RDS mechanism. The FM demodulation in V93000 will also be briefly introduced.

Parallel RF Wafer Sort Production Testing

This paper will discuss the measurement challenges and considerations for known good die testing of an RF SOC (system on chip) device. It will explore the challenges of setting up the multi-site wafer probe card and assembly. It will then discuss factors taken into account when selecting a probe station, RF wafer probe card, and ATE (automatic test equipment) test system. Challenges of testing RF performance on-wafer are described.

Solving MIPI D-PHY Receiver Test Challenges

MIPI stands for the "Mobile Industry Processor Interface", which provides a flexible, low-cost, high-speed interface solution for communication links between components inside a mobile device. While the MIPI D-PHY specification enables significant extension flexibility for various advanced applications, it also creates new test challenges for device manufacturers. In this paper we will discuss in detail how three-level signals required for MIPI D-PHY testing can be generated on all standard V93000 Pin Scale digital cards.

Mathematical Derivation of the C++ Routine Used to Initialize Arrays with Sinusoidal Waveforms

Since the early 1970s, digital signal processing has become common place. Yet digital creation of waveforms is not often described. This article describes the mathematical process one uses to create single tones, multi-tones, complex multi-tones and IF signals.

An Introduction to WiMax

There are several needs that have to be met simultaneously for successful demodulation analysis. There is creating the ideal waveform, analyzing and understanding the waveform, applying this waveform to the test equipment, acquiring the signal through instrumentation, and finally analyzing the signals to measure the DUT?s performance. Before any of these steps can begin, it is important for users to understand the basics of WiMax modulation, and its essential components.

Multi-Site Efficiency and Throughput

In the ATE (Automated Test Equipment) industry there are two key concepts used to measure the efficiency of making measurements. These concepts are multi-site efficiency and throughput. It is critical that both of these be used together so that all corner cases can be explored. These two concepts and their impact will be explored in this article.

Choosing the Dielectric Material for a V93000 DUT Loadboard

This application note discusses the influence of the dielectric material choice on the performance of DUT loadboards for high-speed digital applications. The objective is to show that changing from a low loss material to an even lower loss material provides little performance increase due to the fact that typical V93000 DUT loadboards have long trace lengths where the skin effect loss dominates the DUT loadboard signal trace loss.

Centering Pulse Waveform

In a settling time measurement, rise/fall time calculation, and tests known as template fitting test, samplers are used to record waveforms. The test signal waveform in such applications is usually a clock signal with 50% duty ratio. You may want to shift this waveform in the unit test period window to a position so you can analyze and parameterize it. This technical note describes how to shift ("center") your waveform to any desired phase.

HVM Receiver Noise Figure Measurements

In the last few years, low-noise amplifiers (LNA) have become integrated into receiver devices that bring signals from the antenna to analog or digital baseband domains (I and Q). In doing so, it has become more commonplace to test noise figure in this RF-to-baseband configuration. There are two primary techniques used to perform noise figure measurements on these devices with automated test equipment (ATE); Y-Factor and Cold Noise (or Gain) methods. Differences between making measurements on RF-to-RF devices and RF-to-baseband devices are discussed in this article. Additionally, considerations for HVM (High-Volume Manufacturing) testing of noise figure are presented.

Application Note - Filter Test using Pseudo Swept Frequencies

Frequency response is a key test item for filters. To measure the gain-frequency response, phase-frequency response, and group delay for filters, you can use the pseudo swept frequencies method. This method incrementally changes the input signal frequency to a filter (DUT), and measures the output signal from the filter.

Method for Calculating SNR for Non-integer Cycle Sine Wave

Sine waves are the most fundamental waveform used in analog tests. In the mixed-signal IC testers which use DSP (digital signal processing), they are used to calculate test parameters such as THD (total harmonic distortion), SNR (signal-to-noise ratio) and frequency characteristics with FFT (fast Fourier transform). However, if the frequency of the measured sine wave is slightly different from expected frequency, and the number of cycles of the captured waveform ceases to be an integer, then FFT processing will cause leakage and the measurement accuracy will decline. Read entire application note.