Test Technology Resource Center


The Test Technology Resource Center makes it easy for you to find test methodologies, technical notes, Q&As prepared by Verigy Application Engineers and access to the Test Technology Library, which contains over 70 valuable technical papers.   
 
New information is published monthly in each category and you can get it delivered to your inbox by subscribing to go/semi, Verigy's monthly newsletter.   


Test Technology Library

 
  Test Methodologies  
Accurate Harmonics Measurement by Sampler: Part 1
This paper introduces the measurement conditions and the method to measure the correct harmonic distortions by the Sampler based on experiments.

Auto-Z Test Cell Software Solution
This paper explains the needs and benefits to the industry of the Auto Z solution and the structure of the current solution on the V93000 with TEL prober, and how it operates.

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  Mixed Signal Lecture Series: DSP-Based Testing – Fundamentals 43: Jitter Estimation from Phase Noise Data
This article discusses how to estimate jitter from phase noise data.

Mixed Signal Lecture Series: DSP-Based Testing – Fundamentals 42: Jitter Calculation by Spectrum
Test/application engineers in the mixed signal field should have thorough knowledge about DSP-based testing. FFT (Fast Fourier Transform) is the most powerful tool here. Continuing from last month, this article will deliver a series of fundamental knowledge of DSP-based testing, especially FFT and its related topics.

Mixed Signal Lecture Series: DSP-Based Testing – Fundamentals 41: FM Stereo Waveform Generation
This article delivers fundamental knowledge of DSP-based testing, especially FFT and its related topics. It will help test/application engineers comprehend what the DSP-based testing is and assorted techniques.


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Technical Notes

 
  Q&A  

GSM/EDGE Output RF Spectrum on the V93000
This article discusses the key transmitter measurement for GSM and EDGE -- the Output RF Spectrum, or ORFS.

A Novel Dynamic Method to Generate PRBS Pattern
To set up PRBS patterns in V93000 SmarTest program development, the engineer would traditionally create a PRBS pattern in ASCII format and then do ASCII to binary conversion process to generate the final loaded pattern. In this paper, a novel dynamic method will be introduced to simplify this whole process and can generate PRBS patterns directly and dynamically based on VECTOR_LABEL_EDIT APIs.

V93000 Direct-Probe: Evolution of the Verigy V93000 SOC Tester in Wafer Probing
This paper explores how the V93000 Direct-Probe™ solution has been shown to be an important evolutionary step in the successful implementation of the Verigy V93000 SOC tester in a KGD wafer probing environment.

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  How do you execute GDDR5 device training during a shmoo run?

Question: "What is a best way to measure pulse width of DisplayPort transmitter with V93000 PS3600?"

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Tools

 
   
   DfX Tools    
  Glossary of DfX Terms acro_icon  70KB
  STIL syntax.vim for VIM notepad_sm  6.17KB
  STIL-mode for EMACS notepad_sm  5.67KB