The RIGHT Architecture... Flexible and future-ready
The requirements of today's SOC/SIP industry for ever higher speeds, performance and pin counts means that test systems must offer greater functionality while maintaining low cost of test. The scalable platform architecture of the Verigy V93000 combines the highest speed digital test, precision analog and RF measurement into a single test system. With the majority of the functionality tightly integrated into the system's test head, the platform offers superior speed as well as the lowest noise floor. Because of its high integration and decentralized resources, the Verigy V93000 SOC Series offers unprecedented scalability and control. Its modular design makes it easy to extend the system with new modules and instrumentation, as your test needs change.
The Verigy V93000 platform is designed to address the critical issues of test performance, cost, time-to-market and the ever-present uncertainty due to changing consumer demands.
Unique Test Processor-Per-Pin
- Independent sequencer and processor behind each pin
- Per pin sequencing, timing, levels for maximum parallel efficiency
- Data analysis in parallel test processors
- Universal channel architecture
- Independent DDR memory-per-pin
- High speed DMA bus
- Advanced water cooling
- DC/DC converters
- Compact - 1000 pins, 18 slots
- Small - 2000 pins, 36 slots
- Large - 4000 pins, 72 slots
FLEXnet based licensing concept offers flexibility, better asset usage, and lower cost of test for SOC/HSM systems.
| Lg Test Head Manipulator Data Sheet |
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| V93000 SmarTest Data Link Data Sheet |
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V93000 Platform