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Top Story
VOICE 2012: Call for Papers Now Open
Technical Notes
A Novel Dynamic Method to Generate PRBS Pattern
V93000 Direct-Probe: Evolution of the Verigy V93000 SOC Tester in Wafer Probing
New Features in V93000 EDGE Demodulation
Test Methodologies
Mixed Signal Lecture Series: DSP-Based Testing – Fundamentals 41: FM Stereo Waveform Generation
Feature Articles
Visit Advantest and Verigy at SEMICON Japan 2011
An Important Message about Verigy.Com Accounts
News
Press Releases
Save the Date:
VOICE 2012 – Imagination. Inspiration. Innovation.
April 24-26, 2012
DoubleTree by Hilton Hotel
San Jose, CA
Find out more about Verigy's
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SoC/SiP
Design for Test/Yield
High Speed Memory
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Top Story
The VOICE 2012 theme highlights Imagination, Inspiration and Innovation. At VOICE, you can inspire new ideas by presenting your thoughts so colleagues can learn from them. VOICE 2012 is the perfect venue for showcasing best practices and new solutions and updating original ideas with new content.
The 2012 call for papers offers three ways for interested presenters to take part in VOICE. Abstracts are now being accepted for 30-minute short-form presentations, 45-minute long-form presentations or participation in expert group discussions for four technology tracks covering:
- Hardware and loadboard solutions, including the latest design trends and tools
- Test techniques and methodologies for achieving new solutions
- Test engineering effectiveness with tips on expediting development of fast test programs
- Production test for cost-effective and throughput-optimized solutions
To respond to the call for papers, go to www.verigy.com/go/VOICE2012. All submissions must be received by November 15, 2011, and accepted presenters will be notified in mid-January 2012.
Technical Notes
PRBS patterns have been widely used in high speed device testing. To set up PRBS patterns in V93000 SmarTest program development, the engineer would traditionally create a PRBS pattern in ASCII format and then do ASCII to binary conversion process to generate the final loaded pattern. In this paper, a novel dynamic method will be introduced to simplify this whole process and can generate PRBS patterns directly and dynamically based on VECTOR_LABEL_EDIT APIs. It not only shortens development time but also provides an advantage in flexibility and extended capability.  396 KB
The increasing proliferation of multi-chip modules (MCMs) and ever decreasing integrated chip (IC) geometry, coupled with the constant drive to reduce overall cost-of-test (COT), have driven semiconductor test toward greater implementation of known-good-die (KGD) testing. However, KGD testing requires increased functional test coverage at wafer probe. For today’s high-speed processor units, functional testing requires that the tester-to-device wafer probing interface deliver similar performance as has traditionally existed in package test. The V93000 Direct-Probe™ solution substantially narrows the interface performance gap between wafer probing and package test for applications using the Verigy V93000 SOC tester in a number of factors, while also maintaining the more stringent mechanical requirements expected of wafer probing environments. The V93000 Direct-Probe™ solution has been shown to be an important evolutionary step in the successful implementation of the Verigy V93000 SOC tester in a KGD wafer probing environment. 874 KB
This work presents an overview of some of the new features pertaining to EDGE found in the V93000 Demodulation Library. These can improve test times and TTM (Time To Market) by allowing users to select demodulation results for either a specific, or multiple EDGE frames (sometimes, loosely referred to as bursts). Code examples are also provided. 178 KB
Test Methodologies
Test/application engineers in the mixed signal field should have thorough knowledge about DSP-based testing. FFT (Fast Fourier Transform) is the most powerful tool here. This article will deliver fundamental knowledge of DSP-based testing, especially FFT and its related topics. It will help test/application engineers comprehend what the DSP-based testing is and assorted techniques. 520 KB
Feature Articles
SEMICON Japan, taking place this year on Dec. 7-9, has grown to become the largest international exhibition of semiconductor equipment and materials. SEMICON Japan 2011 also marks the first time Advantest and Verigy will participate in a trade show together. Be sure to stop by our booth to learn what’s new with the Advantest T2000 and the Verigy V93000
On October 20th, 2011, Verigy experienced an issue with some customer login accounts to Verigy.com. As a result of this issue, you might have received multiple emails regarding expiration of your password and account. The root cause has been identified and corrected, however, if your account was affected, you will need to re-register. To do this, please go to the “Register” tab at the top of the Verigy.com web page. If you encounter issues re-registering your account, please contact us directly via the “Contact Webmaster” link. We apologize for any inconvenience this may have caused.
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Technical Articles from past issues of go/semi can be found in the Test Technology Resource Center
The Test Technology Resource Center holds Technical Notes, Technical Papers, Test Methodologies and Q&A.
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