Verigy Semiconductor Test Newsletter
November 2009
A newsletter of relevant techinical notes, test
methodologies, innovations, events, and news
Go Semi Oct 09 Subscribe Button
Technical Note
Multi-Site P1dB Measurement using Swept Input Power Methodology on V93000 Port Scale RF



Test Methodologies
Mixed Signal Lecture Series: DSP-Based Testing Fundamentals 19 - ADC Histogram Linearity – Programming

Frequency/Phase Movement Analysis by Orthogonal Demodulation

News
Press Releases

Go Semi July 2009 V101 Promo



Find out more about Verigy's products and solutions:

SoC/SiP
Design for Test/Yield
High Speed Memory
Memory



Visit the go/semi web page for past issues of go/semi.

This is your newsletter, so if you have suggestions for articles, new content, or want to give us feedback contact us.






















Technical Note

Multi-Site P1dB Measurement using Swept Input Power Methodology on V93000 Port Scale RF
This application note discusses an approach and its implementation for fast multi-site RX and TX P1dB compression point measurement using Swept Input Power Methodology (SIPM) on the Verigy 93000 Port Scale RF platform. DC waveforms are used to generate controlled LO feed through from the sources for RX measurements, and swept power single side-band waveforms are used for TX measurements, eliminating the need for switching power levels repeatedly and serially for each. acro_icon, 255 KB


Test Methodologies

Mixed Signal Lecture Series: DSP-Based Testing Fundamentals 19 - ADC Histogram Linearity – Programming
This issue is a follow-up for the last month’s article, where novel linearity calculation equa-tions of the ADC histogram methods are described step by step. There are two stimuli – ramp and sine waveforms. Let’s look at the practical program coding in this issue. A dedicated API will be available in the SmarTest soon; however, if you would need more information such as a histogram for your debug/analysis purpose, you may want to deploy the example codes in the issue. acro_icon, 648 KB

Frequency/Phase Movement Analysis by Orthogonal Demodulation: Part 1- Basic Theory and PLL Lock-in Trend Analysis by Waveform Digitizer
In mixed signal system-on-a-chip (SOC) testing, there are many needs to measure phase and frequency change of signals. For instance, in a PLL circuitry, the lock-in time is one of the most typical test items. In a read/write channel device for hard disc drives, small pulse shifts for write pre-compensation are tested. Waveform digitizers or samplers that are typical mixed signal analog equipments can measure such changing frequency/phase with sophisticated digital signal processing. The sampled data is processed with the orthogonal demodulation method (ODM), which can extract the instantaneous phase of the test signal and analyze the frequency/phase changing trend. Swept frequencies, phase-shifted clocks, shifted pulses or edges are analyzed. acro_icon, 1.4 MB.


Q&A

Question: "What is the spectrum shape of the DAC quantization noise?"
In a previous Q&A, it says "The quantization noise of the DAC appears almost like spurious frequencies." Please show the examples. acro_icon, 294 KB

News

Verigy Reports Financial Results for its Fourth Quarter and Fiscal Year 2009

Ten Asian Editors to Tour Verigy’s Silicon Valley Operations

Verigy Announces Fourth Quarter and Fiscal Year 2009 Earnings Release Date and Conference Call


Other

Technical Articles from past issues of go/semi can be found in the Test Technology Resource Center
The Test Technology Resource Center holds Technical Notes, Technical Papers, Test Methodologies and Q&A.




Privacy Officer, Verigy Ltd., 10100 N. Tantau Avenue, Cupertino, CA 95014